;********************************************************************** ; Copyright (C) 2006 Dwayne Forsyth ; ; This program is free software; you can redistribute it and/or ; modify it under the terms of the GNU General Public License ; as published by the Free Software Foundation; either version 2 ; of the License, or (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the ; ; Free Software Foundation, Inc. ; 51 Franklin Street, Fifth Floor ; Boston, MA 02110-1301, USA. ; ;********************************************************************** ; ; This software drives 19-LED circuit board designed by Dwayne ; Forsyth. That flash the 19 color LEDs in pretty patterns. The 1st ; introduction of this blinkie kit was Duckon 15 (www.duckon.com) and ; is now sold on the www.2dkits.com webpage. ; ; If you use this code, find a bug, or improve it please sent an email ; to Dwayne. ; ;********************************************************************** ; ; Filename: 19led_stick_t1.asm ; Date: 06/03/2006 ; File Version: V1 ; ; Author: Dwayne Forsyth ; email: Dwayne@2DKits.com ; Company: www.2DKits.com ; 502 Rue Orleanias ; Deer Park, IL 60010 ; ;********************************************************************** list p=12f683 ; list directive to define processor #include ; processor specific variable definitions __CONFIG _CP_OFF & _CPD_OFF & _BOD_OFF & _PWRTE_ON & _WDT_OFF & _INTRC_OSC_NOCLKOUT & _MCLRE_OFF & _FCMEN_OFF & _IESO_OFF ; '__CONFIG' directive is used to embed configuration data within .asm file. ; The labels following the directive are located in the respective .inc file. ; See respective data sheet for additional information on configuration word. mult_nop macro nup_count local i = 0 while i < nup_count nop i += 1 endw endm LedOut macro word, bit, reg_dir, port btfsc word, bit bcf reg_dir, port endm state_tbl macro num, zero, one, flag Lstate#v(num) if (flag == 0) clrf button endif if (flag == 1) bsf button,0 endif btfsc IR_in,0 goto Lstate#v(num)a movlw zero movwf instate goto Lcontinue Lstate#v(num)a movlw one movwf instate goto Lcontinue endm state2_tbl macro num, name, offset Lstate#v(num) ; save the 1st half of word movf IR_in,w ; save 1st half movwf IR_lhalf incf instate,f goto Lcontinue Lstate#v(num+1) ; save the 2nd half of word ; check for protocal error should get 01 or 10 movf IR_lhalf,w xorwf IR_in,w btfss STATUS, Z goto Lstate#v(num+1)a clrf instate ; error state = zero goto Lcontinue ; set the correct bit in output vars. Lstate#v(num+1)a btfsc IR_in,0 bcf name, offset btfss IR_in,0 bsf name, offset incf instate,f goto Lcontinue endm entry macro a0, a1, a2 retlw a0 retlw a1 retlw a2 endm tbltype1 macro speed retlw 0x01 retlw speed endm make_mtab macro local i = 0 while i <= NUM_TAB retlw HIGH table#v(i) retlw LOW table#v(i) i += 1 endw endm make_state_jump_table macro max_state local i = 0 while i <= max_state retlw HIGH Lstate#v(i) retlw LOW Lstate#v(i) i += 1 endw endm PORTA EQU GPIO TRISA EQU TRISIO NOT_RAPU EQU NOT_GPPU ;***** VARIABLE DEFINITIONS CBLOCK 0x71 ; all banks vars w_temp ; variable used for context saving status_temp ; variable used for context saving regA_dir ; temp TRISA storage pindex ; pattern index input ENDC CBLOCK 0x21 ; bank 0 vars repeat IR_40k tx_on tx_1 out0 out1 out2 out3 out4 scount instate pindex2 IR_in command address toggle IR_lhalf tbl2_hi tbl2_low button regA_out in0 in1 in2 in3 in4 dcount b2l_out_hi b2l_out_low b2l_lcount b2l_in_red b2l_in_green count speed pspeed max_instate count1 count2 pattern tbl_hi tbl_low temp tbltype qcount IR_in_good dirty ploop out_address out_command out_toggle out_pattern demo_mode nextf flip_in flip_out ENDC NUM_TAB EQU d'17' ; number of tables ;********************************************************************** ORG 0x000 ; processor reset vector goto main ; go to beginning of program ORG 0x004 ; interrupt vector location movwf w_temp ; copy W to TEMP register swapf STATUS,w ; Swap status to be saved into W clrf STATUS ; Bank 0 movwf status_temp ; save off contents of PCLATH register nop incfsz count1,f goto skipf incfsz count2,f goto skipf bsf nextf,0 skipf movlw D'33' ; 38k ; E20 256-((27*64)/8) movwf TMR0 ; E21 movf scount,w ; F22 addlw 0 ; F23 btfsc STATUS,Z ; F24 for now don't send! goto send_nothing ; F25 btfss tx_1,0 ; F26 goto send_zero ; F27 ;-------------------------------------------------------------------------------------- send_one ; we are slaming the 36K IR siginal, its like a busy wait! ;-------------------------------------------------------------------------------------- bsf STATUS, RP0 ; switch to bank 1 bcf STATUS, RP1 movlw 0xDE ; set A0 & A5 led to output movwf TRISA bcf STATUS, RP0 ; switch to bank 0 bcf STATUS, RP1 clrf PORTA ; set all outputs to zero bsf PORTA,0 ; A01 call get_next_tx_bit ; 2 + 11 cycles A04-A16 nop nop nop movlw 0x1E ; C26 (23) movwf repeat ; C27 repeat_loop bcf PORTA,0 ; D01 ; mult_nop d'26' ; D02-D27 movlw 07h call qdelay ; 6 + (7 * 3) = 27 ; D02-D27 bsf PORTA,0 ; E01 (27) ; mult_nop d'23' ; E02-E24 movlw 06h ; 6+(6 * 3) = 22 ; E02-E24 call qdelay decfsz repeat,f ; E25 (24) goto repeat_loop ; E26/E27 nop ;E27 goto exit_tx ;-------------------------------------------------------------------------------------- send_zero ; we are going to release all the CPU time to the main line for display. ;-------------------------------------------------------------------------------------- call get_next_tx_bit ; 2 + 11 cycles A04-A16 goto exit_tx ; E25/26 ;-------------------------------------------------------------------------------------- send_nothing ; need to eat 1/2 of the CPU time to make main line smooth. ;-------------------------------------------------------------------------------------- call read_ir_in call get_state_tbl_hi_address call get_state_tbl_low_address call go_state_table call set_max_state movlw 0x0f ; A26 movwf repeat ; A27 repeat_loop3 movlw d'15' ; 6+(15 * 3) = 51 ; B01-B27 + C01-C24 call qdelay decfsz repeat,f ; C25 goto repeat_loop3 ; C26/C27 nop ; C27 ;-------------------------------------------------------------------------------------- exit_tx ;-------------------------------------------------------------------------------------- ; clear timer0 interupt bcf INTCON,T0IF ; E26 bcf PORTA,0 ; F01 ; restore state, return form interupt exit_int swapf status_temp,w ; F02 movwf STATUS ; F03 swapf w_temp,f ; F04 swapf w_temp,w ; F05 retfie ; return from interrupt ; F06/F07 ;-------------------------------------------------------------------------------------- read_ir_in ; 5 cycles ;-------------------------------------------------------------------------------------- bcf IR_in,0 ; 1 btfsc PORTA,3 ; 2 bsf IR_in,0 ; 3 ; movf tx_1,w ; loopback for testing HACK!! ;1 ; xorlw 0x01 ; loopback for testing HACK!! ;2 ; movwf IR_in ; loopback for testing HACK!! ;3 return ; 4/5 ;-------------------------------------------------------------------------------------- set_max_state ; 8 cycles ;-------------------------------------------------------------------------------------- movf max_instate,w ; 1 subwf instate,w ; 2 btfss STATUS,C ; 3 goto smi_l1 ; 4 4/5 movf instate,w ; 5 movwf max_instate ; 6 return ; 7/8 smi_l1 nop ; 6 return ; 7/8 ;-------------------------------------------------------------------------------------- get_next_tx_bit ; 11 cycles ;-------------------------------------------------------------------------------------- bcf tx_1,0 ;1 decf scount,f ;2 bcf STATUS, C ; clear carry bit ;3 rrf out3,f ;4 rrf out2,f ;5 rrf out1,f ;6 rrf out0,f ;7 btfsc STATUS, C ;8 bsf tx_1,0 ;9 ; movf tx_1,w ; loopback for testing HACK!! ; xorlw 0x01 ; loopback for testing HACK!! ; movwf tx_1 ; loopback for testing HACK!! ; mult_nop d'6' ; for debuging return ;10/11 ;********************************************************************** qdelay ;********************************************************************** movwf qcount delay_loop2 decfsz qcount,1 goto delay_loop2 return ;-------------------------------------------------------------------------------------- get_state_tbl_hi_address ; 17 cycles ;-------------------------------------------------------------------------------------- bcf STATUS,0 ; clear carry flag ; 1 rlf instate,w ; entry = table * 2 ; 2 movwf pindex2 ; 3 call table_lookup2 ; 14 (9+2) movwf tbl2_hi ; 15 return ; 16/17 ;-------------------------------------------------------------------------------------- get_state_tbl_low_address ; 18 cycles ;-------------------------------------------------------------------------------------- bcf STATUS,0 ; clear carry flag (just in case) ; 1 rlf instate,w ; entry = table * 2 + 1 ; 2 addlw 1 ; 3 movwf pindex2 ; 4 call table_lookup2 ; 15 (9+2) movwf tbl2_low ; 16 return ; 17/18 ;********************************************************************** table_lookup2 ; 9 cycles ;********************************************************************** movlw HIGH state_jump_table ; 1 movwf PCLATH ; 2 movf pindex2,w ; 3 addlw LOW state_jump_table ; 4 btfsc STATUS,0 ; check carry flag ; 5 incf PCLATH,f ; 6 movwf PCL ; 7 + 2 ;********************************************************************** go_state_table ; 18 cycles ;********************************************************************** movf tbl2_hi,w ; 1 movwf PCLATH ; 2 movf tbl2_low,w ; 3 movwf PCL ; 4 ;********************************************************************** state_jump_table ;********************************************************************** make_state_jump_table d'35' state_tbl 0, 7, 1, 0 state_tbl 1, 0, 2, -1 state_tbl 2, 0, 3, -1 state_tbl 3, 4, 3, -1 state_tbl 4, 0, 5, -1 state_tbl 5, d'11', 0, -1 state_tbl 6, 0, 0, -1 ; junk state state_tbl 7, 8, 0, -1 state_tbl 8, 9, 0, -1 state_tbl 9, d'10', 0, -1 state_tbl d'10', d'10', 0, 1 state2_tbl d'11', toggle, 0 state2_tbl d'13', address, 4 state2_tbl d'15', address, 3 state2_tbl d'17', address, 2 state2_tbl d'19', address, 1 state2_tbl d'21', address, 0 state2_tbl d'23', command, 5 state2_tbl d'25', command, 4 state2_tbl d'27', command, 3 state2_tbl d'29', command, 2 state2_tbl d'31', command, 1 state2_tbl d'33', command, 0 Lstate35 clrf instate bsf IR_in_good,0 mult_nop d'11' ; Lcontinue return ; 17/18 ;********************************************************************** bin2led ;********************************************************************** clrf b2l_out_hi clrf b2l_out_low movlw 0x08 movwf b2l_lcount b2l_loop bcf STATUS, C rrf b2l_in_green,f rlf b2l_out_low,f rlf b2l_out_hi,f rrf b2l_in_red,f rlf b2l_out_low,f rlf b2l_out_hi,f decfsz b2l_lcount,f goto b2l_loop return ;********************************************************************** flipbyte ;********************************************************************** movwf flip_in clrf flip_out movlw 0x08 movwf b2l_lcount fbyte_loop bcf STATUS, C rrf flip_in,f rlf flip_out,f decfsz b2l_lcount,f goto fbyte_loop movfw flip_out return ;********************************************************************** rf_command_out ;********************************************************************** clrf out1 clrf out2 clrf out3 ; start flag movlw B'10100000' movwf out0 ; toggle bit comf out_toggle,f ; toggle the toggle flag btfss out_toggle,0 bsf out1,0 btfsc out_toggle,0 bsf out1,1 ; address bits btfss out_address,4 bsf out1,2 btfsc out_address,4 bsf out1,3 btfss out_address,3 bsf out1,4 btfsc out_address,3 bsf out1,5 btfss out_address,2 bsf out1,6 btfsc out_address,2 bsf out1,7 btfss out_address,1 bsf out2,0 btfsc out_address,1 bsf out2,1 btfss out_address,0 bsf out2,2 btfsc out_address,0 bsf out2,3 ; command bits btfss out_command,5 bsf out2,4 btfsc out_command,5 bsf out2,5 btfss out_command,4 bsf out2,6 btfsc out_command,4 bsf out2,7 btfss out_command,3 bsf out3,0 btfsc out_command,3 bsf out3,1 btfss out_command,2 bsf out3,2 btfsc out_command,2 bsf out3,3 btfss out_command,1 bsf out3,4 btfsc out_command,1 bsf out3,5 btfss out_command,0 bsf out3,6 btfsc out_command,0 bsf out3,7 movlw 0x21 movwf scount return ;********************************************************************** delay ;********************************************************************** movlw 0ffh movwf count delay_loop nop decfsz count,1 goto delay_loop return ;********************************************************************** next_pattern ;********************************************************************** incf pattern,f movf pattern,w sublw NUM_TAB+1 ; max pattern? btfsc STATUS,2 ; z bit check clrf pattern ; reset to zero movfw pattern movwf out_pattern return ;********************************************************************** past_pattern ;********************************************************************** decf pattern,f movf pattern,w addlw 1 ; max pattern? btfss STATUS,2 ; z bit check goto past_exit movlw NUM_TAB movwf pattern movwf out_pattern past_exit return ;********************************************************************** set_pattern ;********************************************************************** movfw command movwf pattern movwf out_pattern set_loop addlw 0xff-NUM_TAB btfss STATUS, C goto set_exit movlw NUM_TAB subwf pattern movfw pattern goto set_loop set_exit return ;********************************************************************** strobe_IO ;********************************************************************** ; ; write to hardware ; bcf INTCON, GIE ; disable INT movlw 0c8h ; clear output the last pattern andwf PORTA,f bsf STATUS, RP0 ; switch to bank 1 bcf STATUS, RP1 movlw 37h ; set led outputs to input iorwf TRISA,f movf regA_dir,w ; set portA direction andwf TRISA,f bcf STATUS, RP0 ; switch to bank 0 bcf STATUS, RP1 movf regA_out,w ; set portA output iorwf PORTA,f bsf INTCON, GIE ; enable INTs return ;********************************************************************** default_IO ;********************************************************************** ; ; set io vars to default state. ; movlw 0ffh movwf regA_dir movlw 00h movwf regA_out return ;********************************************************************** display ;********************************************************************** movf speed,w movwf dcount ; ----------------------- ; Strobe A0 ; ----------------------- dloop call default_IO ; ; Led 13 LedOut in1, 3, regA_dir, 1 ; Led 09 LedOut in1, 7, regA_dir, 2 ; Led 11 LedOut in1, 5, regA_dir, 4 ; IR ; bsf regA_dir, 5 ; strobe A0 bcf regA_dir, 0 bsf regA_out, 0 ; write to hardware call strobe_IO movlw 30h call delay ; ----------------------- ; Strobe A1 ; ----------------------- call default_IO ; ; Led 12 LedOut in1, 4, regA_dir, 0 ; Led 16 LedOut in1, 0, regA_dir, 2 ; Led 18 LedOut in2, 6, regA_dir, 4 ; Led 06 LedOut in0, 2, regA_dir, 5 ; strobe A1 bcf regA_dir, 1 bsf regA_out, 1 ; write to hardware call strobe_IO movlw 30h call delay ; ----------------------- ; Strob A2 ; ----------------------- call default_IO ; ; Led 08 LedOut in0, 0, regA_dir, 0 ; Led 17 LedOut in2, 7, regA_dir, 1 ; Led 15 LedOut in1, 1, regA_dir, 4 ; Led 02 LedOut in0, 6, regA_dir, 5 ; strob A2 bcf regA_dir, 2 bsf regA_out, 2 ; write to hardware call strobe_IO movlw 30h call delay ; ----------------------- ; Strob A4 ; ----------------------- call default_IO ; ; Led 10 LedOut in1, 6, regA_dir, 0 ; Led 19 LedOut in2, 5, regA_dir, 1 ; Led 14 LedOut in1, 2, regA_dir, 2 ; Led 04 LedOut in0, 4, regA_dir, 5 ; strob A4 bcf regA_dir, 4 bsf regA_out, 4 ; write to hardware call strobe_IO movlw 30h call delay ; ----------------------- ; Strob A5 ; ----------------------- call default_IO ; ; Led 01 LedOut in0, 7, regA_dir, 0 ; Led 6 LedOut in0, 1, regA_dir, 1 ; Led 4 LedOut in0, 5, regA_dir, 2 ; Led 11 LedOut in0, 3, regA_dir, 4 ; strob A5 bcf regA_dir, 5 bsf regA_out, 5 ; write to hardware call strobe_IO movlw 30h call delay decfsz dcount,1 goto dloop return ;********************************************************************** display_pattern_id ;********************************************************************** movf pattern,w addlw 1 call flipbyte movwf in0 movlw 0x00 movwf in1 movwf in2 movlw 0xff btfsc demo_mode,0 movwf in2 movlw 0x7F movwf speed call display return ;********************************************************************** setup_pattern_table ;********************************************************************** stop2 movf pattern,w btfss STATUS,Z goto slabel1 ; ; if patten is zero, check eeprom and verify 1st entry is not a 0x00 ; if it is switch to next pattern. clrw call read_eeprom movwf temp clrf demo_mode btfsc temp,7 bsf demo_mode,0 movfw temp btfss STATUS,Z goto sreturn call next_pattern goto stop2 slabel1 ; ; Set the pattern (table) ; movlw HIGH MasterTable movwf tbl_hi movlw LOW MasterTable movwf tbl_low ; get the high address for the pattern table bcf STATUS,0 ; clear carry flag rlf pattern,w ; entry = table * 2 movwf pindex bcf INTCON, GIE ; disable INTs call table_lookup bsf INTCON, GIE ; enable INTs movwf temp ; can't put it in tbl_high yet ; get the low address for the pattern table bcf STATUS,0 ; clear carry flag (just in case) rlf pattern,w ; entry = table * 2 + 1 addlw 1 movwf pindex bcf INTCON, GIE ; disable INTs call table_lookup bsf INTCON, GIE ; enable INTs movwf tbl_low movf temp,w movwf tbl_hi sreturn return ;********************************************************************** get_next_pattern_entry ;********************************************************************** movf pattern,w btfss STATUS,Z goto glabel1 movf pindex,w call read_eeprom goto greturn glabel1 movf pindex,w bcf INTCON, GIE ; disable INTs call table_lookup bsf INTCON, GIE ; enable INTs greturn incf pindex,f return ;********************************************************************** write_eeprom ;********************************************************************** bsf STATUS, RP0 ; bank 1 bcf STATUS, RP1 bsf EECON1,WREN ; allow writes to eeprom bcf INTCON, GIE ; disable INTs movf pindex,w movwf EEADR ; load address movf input,w movwf EEDAT ; lead data movlw 0x55 ; unlock movwf EECON2 movlw 0xAA movwf EECON2 bsf EECON1,WR bsf INTCON, GIE bcf STATUS, RP0 ; bank 0 bcf STATUS, RP1 ; need a delay for the write of eeprom before we read it again, a call to the ; display does the trick. A read before the write is done is bad! ; movlw 0xfF movwf in0 movwf in1 movwf in2 movlw 0x3f movwf speed call display return ;********************************************************************** read_eeprom ;********************************************************************** ; ; address of eeprom to read passed in x reg ; value read passed out in x reg ; ; movf pindex,w ; switch bank 1 bsf STATUS, RP0 bcf STATUS, RP1 movwf EEADR bcf EECON1, 7 ; EEPDG bsf EECON1, RD movf EEDAT, w ; switch bank 0 bcf STATUS, RP0 bcf STATUS, RP1 ; movwf input return ;********************************************************************** toggle_demo ;********************************************************************** clrw call read_eeprom movwf temp btfss temp,7 ; goto tdemo_on ; toggle off bcf temp,7 clrf demo_mode goto tdemo_cont tdemo_on bsf temp,7 bsf demo_mode,0 tdemo_cont clrf pindex movfw temp movwf input call write_eeprom call display_pattern_id call display_pattern_id return ;********************************************************************** pattern_driver ;********************************************************************** ptop call setup_pattern_table clrf pindex ; load the table type (Currently only 1 type) call get_next_pattern_entry movwf tbltype ; load the speed (someday this will be a table type 1 only thing.) call get_next_pattern_entry movwf pspeed incf pspeed,f ; adjust so 0 is fastest, not treated like speed 256 ploop0 ; ; Check for IR command in ; btfss IR_in_good,0 goto button_check blinkie_check movlw 0x07 ; blinkines use address 0x07 (Experimental) subwf address,w btfss STATUS,Z goto remote_check call set_pattern clrf IR_in_good goto ptop remote_check movf address,f ; remote giving "0" for address (TV)? btfss STATUS,Z goto button_check movlw 0x20 ; remote curser right (pattern ++) subwf command,w btfsc STATUS,Z call next_pattern movlw 0x21 ; remote curser left (pattern --) subwf command,w btfsc STATUS,Z call past_pattern movlw 0x00 ; remote "0" key (pattern = 0) subwf command,w btfsc STATUS,Z clrf pattern movlw 0x0c ; remote on/off key (togle demo mode!) subwf command,w btfsc STATUS,Z call toggle_demo clrf IR_in_good goto ptop button_check ; ploop1 btfss button,0 ; if putton pressed show pattern id goto ploop2 call display_pattern_id call display_pattern_id btfss button,0 ; if putton still pressed inc pattern goto ploop2 ploop1a call next_pattern call display_pattern_id btfsc button,0 goto ploop1a goto ptop ploop2 call get_next_pattern_entry movwf in0 call get_next_pattern_entry movwf in1 call get_next_pattern_entry movwf in2 movf pspeed,w movwf speed call display ; make sure we are not sending a IR signel movf scount,w ; F22 addlw 0 ; F23 btfss STATUS,Z ; F24 goto ploop3 ; count down till net IR signel btfss nextf,0 goto ploop3 clrf nextf btfss demo_mode,0 goto ploop2a call next_pattern goto ptop ploop2a ; send an IR signel movlw 0x07 ; address 0x07 "Experimental" movwf out_address movfw out_pattern movwf out_command ; copy out_pettern call rf_command_out ploop3 ; check for end of pattern btfss in2,0 goto ploop0 goto ptop ;********************************************************************** ; IR Tester ;********************************************************************** IR_Tester itop movf instate,w call flipbyte movwf in0 movf max_instate,w call flipbyte movwf in1 clrf in2 movlw 0x01 movwf speed call display ; ; Check for push button ; btfss button,0 goto iloop1 clrf max_instate clrf instate movf scount,w ; F22 addlw 0 ; F23 btfss STATUS,Z ; F24 goto iloop1 ; send an IR signel clrf out_address ; address 0x00 "TV remote" movlw 0x0c movwf out_command ; code 0x0c (on/off) call rf_command_out ; ; Check for IR Command ; iloop1 btfss IR_in_good,0 goto itop clrf IR_in_good ; flash all LEDs on movlw 0xFF movwf in0 movwf in1 movwf in2 movlw 0x7f movwf speed call display ; flash all LEDs off movlw 0x00 movwf in0 movwf in1 movwf in2 movlw 0x3f movwf speed call display ; flash all LEDs on movlw 0xFF movwf in0 movwf in1 movwf in2 movlw 0x7f movwf speed call display ; display command and address movf command,w call flipbyte movwf in0 movf address,w call flipbyte movwf in1 clrf in2 movlw 0xff movwf speed call display call display clrf max_instate clrf instate goto itop ; ; M A I N ; ;********************************************************************** main ;********************************************************************** clrf PORTA clrf TMR0 clrf IR_40k clrf scount clrf toggle clrf address clrf command clrf IR_lhalf clrf instate clrf max_instate clrf button clrf IR_in_good clrf nextf ; setting portC to digital movlw 07h movwf CMCON0 clrwdt ; for safty ; Bank 1 bsf STATUS, RP0 bcf STATUS, RP1 ; setup timer0 & pullups ; +---------- disable pullups on portA (1) ; | +-------- source Int clock (o) ; | | +------ prescaler on timer0 (0) ; | | |+++--- prescaler set to 8X (010) ; | | |||| movlw b'10000010' movwf OPTION_REG ; switch to 8mH clock bsf OSCCON, IRCF0 bsf OSCCON, IRCF1 bsf OSCCON, IRCF2 ; setting portC to digital clrf ANSEL ; IR tx output on A4 bcf TRISA,4 ; Bank 0 bcf STATUS, RP0 bcf STATUS, RP1 ; enable timer0 interupt bsf INTCON,T0IE bsf INTCON,GIE ; start with pattern 0 clrf pattern ; flash all LEDs on This kills some time, allowing us to sample the button and IR-Rx movlw 0xFF movwf in0 movwf in1 movwf in2 movlw 0x7f movwf speed call display ; if button pressed durring powerup run IR_Tester ; else run pattern driver ; btfss button,0 goto pattern_driver goto IR_Tester ;********************************************************************** table_lookup ;********************************************************************** movf tbl_hi,w movwf PCLATH movf pindex,w addwf tbl_low,w btfsc STATUS,0 ; check carry flag incf PCLATH,f movwf PCL ;********************************************************************** MasterTable ;********************************************************************** make_mtab ;********************************************************************** table0 ; dump entry, table 0 is in eeprom ;********************************************************************** ;********************************************************************** table1 ; DF1 - retro ;********************************************************************** tbltype1 0x10 entry 0x00, 0x00, 0x20 ; L19 entry 0x00, 0x00, 0x40 ; L18 entry 0x00, 0x00, 0x80 ; L17 entry 0x00, 0x01, 0x00 ; L16 entry 0x00, 0x02, 0x00 ; L15 entry 0x00, 0x04, 0x00 ; L14 entry 0x00, 0x08, 0x00 ; L13 entry 0x00, 0x10, 0x00 ; L12 entry 0x00, 0x20, 0x00 ; L11 entry 0x00, 0x40, 0x00 ; L10 entry 0x00, 0x80, 0x00 ; L9 entry 0x01, 0x00, 0x00 ; L8 entry 0x02, 0x00, 0x00 ; L7 entry 0x04, 0x00, 0x00 ; L6 entry 0x08, 0x00, 0x00 ; L5 entry 0x10, 0x00, 0x00 ; L4 entry 0x20, 0x00, 0x00 ; L3 entry 0x40, 0x00, 0x00 ; L2 entry 0x80, 0x00, 0x00 ; L1 entry 0x00, 0x00, 0x01 ; Blank ;********************************************************************** table2 ; DF2 - xmas ;********************************************************************** tbltype1 0x20 entry 0x00, 0x00, 0x20 ; L19 entry 0x00, 0x00, 0x60 ; L18 entry 0x00, 0x00, 0xE0 ; L17 entry 0x00, 0x01, 0xE0 ; L16 entry 0x00, 0x03, 0xE0 ; L15 entry 0x00, 0x07, 0xE0 ; L14 entry 0x00, 0x0F, 0xE0 ; L13 entry 0x00, 0x1F, 0xE0 ; L12 entry 0x00, 0x3F, 0xE0 ; L11 entry 0x00, 0x7F, 0xE0 ; L10 entry 0x00, 0xFF, 0xE0 ; L9 entry 0x01, 0xFF, 0xE0 ; L8 entry 0x03, 0xFF, 0xE0 ; L7 entry 0x07, 0xFF, 0xE0 ; L6 entry 0x0F, 0xFF, 0xE0 ; L5 entry 0x1F, 0xFF, 0xE0 ; L4 entry 0x3F, 0xFF, 0xE0 ; L3 entry 0x7F, 0xFF, 0xE0 ; L2 entry 0xFF, 0xFF, 0xE0 ; L1 entry 0x00, 0x00, 0x01 ; Blank ;********************************************************************** table3 ; DF3 - train ;********************************************************************** tbltype1 0x10 entry 0x00, 0x00, 0x20 ; L19 entry 0x00, 0x00, 0x40 ; L18 entry 0x00, 0x00, 0x80 ; L17 entry 0x00, 0x01, 0x00 ; L16 entry 0x00, 0x02, 0x00 ; L15 entry 0x00, 0x04, 0x00 ; L14 entry 0x00, 0x08, 0x00 ; L13 entry 0x00, 0x10, 0x00 ; L12 entry 0x00, 0x20, 0x00 ; L11 entry 0x00, 0x40, 0x00 ; L10 entry 0x00, 0x80, 0x00 ; L9 entry 0x01, 0x00, 0x00 ; L8 entry 0x02, 0x00, 0x00 ; L7 entry 0x04, 0x00, 0x00 ; L6 entry 0x08, 0x00, 0x00 ; L5 entry 0x10, 0x00, 0x00 ; L4 entry 0x20, 0x00, 0x00 ; L3 entry 0x40, 0x00, 0x00 ; L2 entry 0x80, 0x00, 0x00 ; L1 entry 0x40, 0x00, 0x00 ; L2 entry 0x20, 0x00, 0x00 ; L3 entry 0x10, 0x00, 0x00 ; L4 entry 0x08, 0x00, 0x00 ; L5 entry 0x04, 0x00, 0x00 ; L6 entry 0x02, 0x00, 0x00 ; L7 entry 0x01, 0x00, 0x00 ; L8 entry 0x00, 0x80, 0x00 ; L9 entry 0x00, 0x40, 0x00 ; L10 entry 0x00, 0x20, 0x00 ; L11 entry 0x00, 0x10, 0x00 ; L12 entry 0x00, 0x08, 0x00 ; L13 entry 0x00, 0x04, 0x00 ; L14 entry 0x00, 0x02, 0x00 ; L15 entry 0x00, 0x01, 0x00 ; L16 entry 0x00, 0x00, 0x80 ; L17 entry 0x00, 0x00, 0x41 ; L18 ;********************************************************************** table4 ; DF4 - on off ;********************************************************************** tbltype1 0x30 entry 0x55, 0x55, 0x50 ; 1 entry 0xAA, 0xAA, 0xA1 ; 2 ;********************************************************************** table5 ; DF5 - fast ;********************************************************************** tbltype1 0x00 entry 0x00, 0x00, 0x20 ; L19 entry 0x00, 0x00, 0x40 ; L18 entry 0x00, 0x00, 0x80 ; L17 entry 0x00, 0x01, 0x00 ; L16 entry 0x00, 0x02, 0x00 ; L15 entry 0x00, 0x04, 0x00 ; L14 entry 0x00, 0x08, 0x00 ; L13 entry 0x00, 0x10, 0x00 ; L12 entry 0x00, 0x20, 0x00 ; L11 entry 0x00, 0x40, 0x00 ; L10 entry 0x00, 0x80, 0x00 ; L9 entry 0x01, 0x00, 0x00 ; L8 entry 0x02, 0x00, 0x00 ; L7 entry 0x04, 0x00, 0x00 ; L6 entry 0x08, 0x00, 0x00 ; L5 entry 0x10, 0x00, 0x00 ; L4 entry 0x20, 0x00, 0x00 ; L3 entry 0x40, 0x00, 0x00 ; L2 entry 0x80, 0x00, 0x00 ; L1 entry 0x00, 0x00, 0x01 ; Blank ;********************************************************************** table6 ; DF6 - center ;********************************************************************** tbltype1 0x30 entry 0x80, 0x00, 0x20 ; L19 entry 0x40, 0x00, 0x40 ; L18 entry 0x20, 0x00, 0x80 ; L17 entry 0x10, 0x01, 0x00 ; L16 entry 0x08, 0x02, 0x00 ; L15 entry 0x04, 0x04, 0x00 ; L14 entry 0x02, 0x08, 0x00 ; L13 entry 0x01, 0x10, 0x00 ; L12 entry 0x00, 0xA0, 0x00 ; L11 entry 0x00, 0x40, 0x01 ; L10 ;********************************************************************** table7 ; DF7 - right ;********************************************************************** tbltype1 0x10 entry 0x00, 0x00, 0x20 ; L19 entry 0x00, 0x00, 0x40 ; L18 entry 0x00, 0x00, 0x80 ; L17 entry 0x00, 0x01, 0x10 ; L16 entry 0x00, 0x02, 0x20 ; L15 entry 0x00, 0x04, 0x40 ; L14 entry 0x00, 0x08, 0x80 ; L13 entry 0x00, 0x11, 0x00 ; L12 entry 0x00, 0x22, 0x00 ; L11 entry 0x00, 0x44, 0x00 ; L10 entry 0x00, 0x88, 0x00 ; L9 entry 0x01, 0x10, 0x00 ; L8 entry 0x02, 0x20, 0x00 ; L7 entry 0x04, 0x40, 0x00 ; L6 entry 0x08, 0x80, 0x00 ; L5 entry 0x11, 0x00, 0x00 ; L4 entry 0x22, 0x00, 0x00 ; L3 entry 0x44, 0x00, 0x00 ; L2 entry 0x88, 0x00, 0x00 ; L1 entry 0x10, 0x00, 0x00 ; L4 entry 0x20, 0x00, 0x00 ; L3 entry 0x40, 0x00, 0x00 ; L2 entry 0x80, 0x00, 0x01 ; L1 ;********************************************************************** table8 ; DF8 - chaser ;********************************************************************** tbltype1 0x10 entry 0x11, 0x11, 0x10 ; L18 entry 0x22, 0x22, 0x20 ; L17 entry 0x44, 0x44, 0x40 ; L16 entry 0x88, 0x88, 0x81 ; L15 ;********************************************************************** table9 ; DF8 - forward/backward chaser ;********************************************************************** tbltype1 0x07 entry 0x11, 0x11, 0x10 ; L18 entry 0x22, 0x22, 0x20 ; L17 entry 0x44, 0x44, 0x40 ; L16 entry 0x88, 0x88, 0x80 ; L15 entry 0x11, 0x11, 0x10 ; L18 entry 0x22, 0x22, 0x20 ; L17 entry 0x44, 0x44, 0x40 ; L16 entry 0x88, 0x88, 0x80 ; L15 entry 0x11, 0x11, 0x10 ; L18 entry 0x22, 0x22, 0x20 ; L17 entry 0x44, 0x44, 0x40 ; L16 entry 0x88, 0x88, 0x80 ; L15 entry 0x44, 0x44, 0x40 ; L16 entry 0x22, 0x22, 0x20 ; L17 entry 0x11, 0x11, 0x10 ; entry 0x88, 0x88, 0x80 ; L15 entry 0x44, 0x44, 0x40 ; L16 entry 0x22, 0x22, 0x20 ; L17 entry 0x11, 0x11, 0x10 ; entry 0x88, 0x88, 0x80 ; L15 entry 0x44, 0x44, 0x40 ; L16 entry 0x22, 0x22, 0x21 ; L17 ;********************************************************************** table10 ; DF8 - shift ;********************************************************************** tbltype1 0x20 entry 0x2A, 0xAA, 0xA0 ; 1 entry 0x4A, 0xAA, 0xA0 ; 2 entry 0x52, 0xAA, 0xA0 ; 3 entry 0x54, 0xAA, 0xA0 ; 4 entry 0x55, 0x2A, 0xA0 ; 5 entry 0x55, 0x4A, 0xA0 ; 6 entry 0x55, 0x52, 0xA0 ; 7 entry 0x55, 0x54, 0xA0 ; 8 entry 0x55, 0x55, 0x20 ; 9 entry 0x55, 0x55, 0x40 ; 10 entry 0xA5, 0x55, 0x40 ; 11 entry 0xA9, 0x55, 0x40 ; 12 entry 0xAA, 0x55, 0x40 ; 13 entry 0xAA, 0x95, 0x40 ; 14 entry 0xAA, 0xA5, 0x40 ; 15 entry 0xAA, 0xA9, 0x40 ; 16 entry 0xAA, 0xAA, 0x80 ; 17 entry 0xAA, 0xAA, 0xA1 ; 18 ;********************************************************************** table11 ; DF8 - four running ;********************************************************************** tbltype1 0x20 entry 0x80, 0x00, 0x00 ; 1 entry 0xC0, 0x00, 0x00 ; 2 entry 0xE0, 0x00, 0x00 ; 3 entry 0xF0, 0x00, 0x00 ; 2 entry 0x78, 0x00, 0x00 ; 4 entry 0x3C, 0x00, 0x00 ; 5 entry 0x1E, 0x00, 0x00 ; 6 entry 0x0F, 0x00, 0x00 ; 2 entry 0x07, 0x80, 0x00 ; 7 entry 0x03, 0xC0, 0x00 ; 8 entry 0x01, 0xE0, 0x00 ; 9 entry 0x00, 0xF0, 0x00 ; 2 entry 0x00, 0x78, 0x00 ; 2 entry 0x00, 0x3C, 0x00 ; 2 entry 0x00, 0x1E, 0x00 ; 2 entry 0x00, 0x0F, 0x00 ; 2 entry 0x00, 0x07, 0x80 ; 2 entry 0x00, 0x03, 0xC0 ; 2 entry 0x00, 0x01, 0xE0 ; 2 entry 0x00, 0x00, 0x60 ; 2 entry 0x00, 0x00, 0x20 ; 2 entry 0x00, 0x00, 0x01 ; blank ;********************************************************************** table12 ; DF8 - down ;********************************************************************** tbltype1 0x03 entry 0x00, 0x00, 0x20 ; L19 entry 0x00, 0x00, 0x60 ; L18 entry 0x00, 0x00, 0xE0 ; L17 entry 0x00, 0x01, 0xE0 ; L16 entry 0x00, 0x03, 0xE0 ; L15 entry 0x00, 0x07, 0xE0 ; L14 entry 0x00, 0x0F, 0xE0 ; L13 entry 0x00, 0x1F, 0xE0 ; L12 entry 0x00, 0x3F, 0xE0 ; L11 entry 0x00, 0x7F, 0xE0 ; L10 entry 0x00, 0xFF, 0xE0 ; L9 entry 0x01, 0xFF, 0xE0 ; L8 entry 0x03, 0xFF, 0xE0 ; L7 entry 0x07, 0xFF, 0xE0 ; L6 entry 0x0F, 0xFF, 0xE0 ; L5 entry 0x1F, 0xFF, 0xE0 ; L4 entry 0x3F, 0xFF, 0xE0 ; L3 entry 0x7F, 0xFF, 0xE0 ; L2 entry 0xFF, 0xFF, 0xE0 ; L1 entry 0xFF, 0xFF, 0xC0 ; entry 0xFF, 0xFF, 0x80 ; entry 0xFF, 0xFF, 0x00 ; entry 0xFF, 0xFE, 0x00 ; entry 0xFF, 0xFC, 0x00 ; entry 0xFF, 0xF8, 0x00 ; entry 0xFF, 0xF0, 0x00 ; entry 0xFF, 0xE0, 0x00 ; entry 0xFF, 0xC0, 0x00 ; entry 0xFF, 0x80, 0x00 ; entry 0xFF, 0x00, 0x00 ; entry 0xFE, 0x00, 0x00 ; entry 0xFC, 0x00, 0x00 ; entry 0xF8, 0x00, 0x00 ; entry 0xF0, 0x00, 0x00 ; entry 0xE0, 0x00, 0x00 ; entry 0xC0, 0x00, 0x00 ; entry 0x80, 0x00, 0x00 ; entry 0x00, 0x00, 0x01 ; ;********************************************************************** table13 ; DF8 - down ;********************************************************************** tbltype1 0x10 entry 0x92, 0x49, 0x20 ; Red entry 0x24, 0x92, 0x40 ; Red entry 0x49, 0x24, 0x81 ; Red ;********************************************************************** table14 ; DF8 - down ;********************************************************************** tbltype1 0x10 entry 0x92, 0x49, 0x20 ; Red entry 0x49, 0x24, 0x80 ; Red entry 0x24, 0x92, 0x41 ; Red ;********************************************************************** table15 ; DF8 - down ;********************************************************************** tbltype1 0x05 entry 0x00, 0x00, 0x20 ; L19 entry 0x00, 0x00, 0x80 ; L17 entry 0x00, 0x02, 0x00 ; L15 entry 0x00, 0x08, 0x00 ; L13 entry 0x00, 0x20, 0x00 ; L11 entry 0x00, 0x80, 0x00 ; L9 entry 0x02, 0x00, 0x00 ; L7 entry 0x08, 0x00, 0x00 ; L5 entry 0x20, 0x00, 0x00 ; L3 entry 0x80, 0x00, 0x00 ; L1 entry 0x00, 0x00, 0x00 ; Blank entry 0x00, 0x00, 0x40 ; L18 entry 0x00, 0x01, 0x00 ; L16 entry 0x00, 0x04, 0x00 ; L14 entry 0x00, 0x10, 0x00 ; L12 entry 0x00, 0x40, 0x00 ; L10 entry 0x01, 0x00, 0x00 ; L8 entry 0x04, 0x00, 0x00 ; L6 entry 0x10, 0x00, 0x00 ; L4 entry 0x40, 0x00, 0x00 ; L2 entry 0x00, 0x00, 0x01 ; Blank ;********************************************************************** table16 ; DF8 - round ;********************************************************************** tbltype1 0x05 entry 0x00, 0x00, 0x20 ; L19 entry 0x00, 0x00, 0x80 ; L17 entry 0x00, 0x02, 0x00 ; L15 entry 0x00, 0x08, 0x00 ; L13 entry 0x00, 0x20, 0x00 ; L11 entry 0x00, 0x80, 0x00 ; L9 entry 0x02, 0x00, 0x00 ; L7 entry 0x08, 0x00, 0x00 ; L5 entry 0x20, 0x00, 0x00 ; L3 entry 0x80, 0x00, 0x00 ; L1 entry 0x40, 0x00, 0x00 ; L2 entry 0x10, 0x00, 0x00 ; L4 entry 0x04, 0x00, 0x00 ; L6 entry 0x01, 0x00, 0x00 ; L8 entry 0x00, 0x40, 0x00 ; L10 entry 0x00, 0x10, 0x00 ; L12 entry 0x00, 0x04, 0x00 ; L14 entry 0x00, 0x01, 0x00 ; L16 entry 0x00, 0x00, 0x41 ; L18 ;********************************************************************** table17 ; DF1 - retro ;********************************************************************** tbltype1 0x10 entry 0x00, 0x00, 0x60 ; L19, L18 entry 0x00, 0x01, 0x80 ; L17, L16 entry 0x00, 0x06, 0x00 ; L15, L14 entry 0x00, 0x18, 0x00 ; L13, L12 entry 0x00, 0x60, 0x00 ; L11, L10 entry 0x01, 0x80, 0x00 ; L9, L8 entry 0x06, 0x00, 0x00 ; L7, l6 entry 0x18, 0x00, 0x00 ; L5, L4 entry 0x60, 0x00, 0x00 ; L3, L2 entry 0x00, 0x00, 0x01 ; Blank ;********************************************************************** ; eeprom ;********************************************************************** ORG 0x2100 ; data EEPROM location DE 0x01,0x32 DE 0x80, 0x00, 0x00 ; L1 DE 0x40, 0x00, 0x00 ; L2 DE 0x20, 0x00, 0x00 ; L3 DE 0x10, 0x00, 0x00 ; L4 DE 0x08, 0x00, 0x00 ; L5 DE 0x04, 0x00, 0x00 ; L6 DE 0x02, 0x00, 0x00 ; L7 DE 0x01, 0x00, 0x00 ; L8 DE 0x00, 0x80, 0x00 ; L9 DE 0x00, 0x40, 0x00 ; L10 DE 0x00, 0x20, 0x00 ; L11 DE 0x00, 0x10, 0x00 ; L12 DE 0x00, 0x08, 0x00 ; L13 DE 0x00, 0x04, 0x00 ; L14 DE 0x00, 0x02, 0x00 ; L15 DE 0x00, 0x01, 0x00 ; L16 DE 0x00, 0x00, 0x80 ; L17 DE 0x00, 0x00, 0x40 ; L18 DE 0x00, 0x00, 0x20 ; L19 DE 0x00, 0x00, 0x01 ; BLank END ; directive 'end of program'